Comparative Specifications



Processor Overview

In common with the rest of the Ryzen 9000-series, the 9950X3D is a Zen 5 design built for the AM5 platform. AMD has continued to opt for TSMC’s 4NM lithography for the frequency-sensitive CCD and 6NM for the IOD, a component that is less sensitive to the benefits of the smaller process node.

The Ryzen 9000-series also continues to be built with the chiplet design principles they’ve leveraged since the 3000-series, but with considerable improvements to the underlying core architecture and manufacturing process that make it a significant improvement over the older series.

The 9950X3D consists of two CCDs and a single IOD packaged on a single substrate. Each CCD has all eight cores unlocked with support for two threads per core for a total of 16 per die (and 32 overall). Cores have 80KB private L1 Cache and 1MB private L2 Cache, while a 32MB L3 Cache pool is shared across all cores on the CCD.

3D V-Cache

AMD’s 3D V-Cache is an additional large pooled cache present on CPUs with the X3D suffix. Ryzen 9000X3D-series CPUs boast 64MB of 3D V-Cache that acts as an ancillary store of cached data prior to requesting from system memory.

3D V-Cache is faster and can be accessed with much lower latency than system memory, considerably accelerating workloads which can exploit it effectively. Time-sensitive applications such as gaming have benefited significantly from its introduction as this fast data store reduces how often slow data requests need to be made, slow requests that can cripple frame rates on even high-end graphics hardware.

AMD’s 9000X3D-series packages the 3D V-Cache slightly differently to the 7000X3D- and 5000X3D-series. Rather than being stacked on top of the CCD, acting as an temperature insulating layer for those cores, it places the cache under the CCD. This subtle change significantly improved stability at higher voltages and operating temperatures, allowing the X3D-chip to all-but match the operating frequencies of their non-X3D counterparts.

Challenges

One vulnerability of this approach is that the performance characteristics of a CCD with 3D V-Cache differs quite a bit from one without the cache. For single CCD parts like the 9800X3D and 7800X3D that’s not a big deal, but it can be crippling to performance for CPUs with a mix of CCD types like the 7950X3D and 7900X3D if the Operating System doesn’t account for it. Workloads that can take best advantage of the cache need to



Process thread management at the OS level is therefore deeply important. Core affinity, where the OS is aware that a process can benefit from the capabilities of a particular core(s) and will seek to keep the process located there, is extremely useful. Core parking, which disables certain cores when the system has no use for them and therefore reduces the chances a process will get nudged to them by other management logic, is another tool in the OS toolbox. Finally, the thread management system needs to be aware of processes which benefit most from the 64MB of additional cache, i.e. typically, but not limited to, videogames.

Since the introduction of mismatched core types on Intel’s desktop processor line, and wider use of 7950X3D/7900X3D processors on AM5, efficient detection and allocation of increasingly diverse CPU resources has become a greater priority for Windows. Common symptoms of it failing to do so are poorer 1% and 0.1% lows in videogame benchmarking and gameplay experience which can be extremely frustrating to diagnose and troubleshoot for non-experts.

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In most other respects the Ryzen 9 9950X3D is identical to the Ryzen 9 9950X we reviewed last year. Underlying aspects of the processor, particularly operating voltages and temperatures, will mean that dynamic frequency boosting characteristics will be subtly different however, and we would generally expect maximum boost clocks to be lower long-term for the X3D part. The innate variability of silicon quality between chips will tend to mask empirical observation of these differences.