Other Lithography Techniques

There are various forms of photolithography each with different strengths and weaknesses though not all are suitable for printing semi-conductors.
Includes:

• Electron beam litho (e-beam litho or EBL)
• Nano-imprint Litho (NIL)
• Ion bean Litho

Electron beam lithography is a very fine and high resolution process but is known to have a slow throughput and because electrons have a physically 'near non existent' mass thus the 'photoresist' requires longer exposure to the lightweight beam. Although the primary e-beam has a fine resolution it suffers from 'scattering' of secondary electrons which causes imperfections in the photo resist. Limitations to around 20nm are best in regards to quality as secondary electrons have been observed to travel over 100nm. Back scattering is an issue too, this is when electrons from the primary beam bounce back and disturb the beam whence it came.
Intel are using e-beam lithography on their 22nm Ivy Bridge CPUs to create the 3D 'Tri-Gates' and as e-beam processes mature, patterning of 5-7nm has been verified as methods to control scattering develop.




Nano-imprint lithography is a novel and relatively simple technique using fine templates which can be whole wafers or individual dies. It is also relatively simple to create '3D' patterning as it simply neds to be etched into the template. However this process is limited to the abilities of other lithographic processes to create the templates and the templates suffer from wear as with any mechanical device. Despite its advantages it is not considered to be an ideal option.

Death-RAY

DEATH RAY

Ion-Beam Lithography and 3D fin-FETS

Ion beam lithography is separated into 3 types:
• FIB (Focused Ion Beam),
• Proton Beam Writing (p-beam writing)
• Ion Projection Lithography (IPL)

Ion beam lithography allows carving and shaping of silicon and is able to create 3D architectures. I am sure that it will eventually play a major role in semi conductor fabrication and here is why.

Ion beam lithography uses protons rather than electrons, while electrons may have a theoretical higher resolution, we are dealing with elements and these elements are made of atoms thus sub-atomic leptons, that is, electrons, are not an ideal solution to be displacing the comapartively gargantuan atoms.

Using Neon or Helium ion beam lithography (NIBL, HIBL)has been reported to be ~ x1000 times more efficient than using EBL at resolutions of 5-7nm. Helium of course is the second smallest atom thus with refinement maybe it is possible to edge it up to terminal resolution.






As with almost everything to do with physics, physical surface area plays a hugely important role in the conduction of practically everything from heat to electrical current and to overcome the physical limitations of 2D architecture, soon we will be entering a phase of 3D microarchitecture with Intel’s 3D 'Tri-Gates'.
I would like to point out that this is not an Intel innovation but they will be first to implement the technology in mainstream production. Most other semi-conductor companies argue that fin-FET or multi gate transistors are not needed until sub 20nm. Now, just an explanation, 3D transistors does NOT = 3D architecture. In fact it is often referred to as 2.5D or two and a half D this is because interconnections on the CPU are 'still' planar. The process of using ‘3D’ multi gate transistors or fin-FETs using either e-beam lithography or Ion-Beam lithography will eventually become commonplace.

I’m not overly interested is discussing how transistors work but to briefly skip on some details (I’m not expert so forgive me for any inaccuracies). Transistors switch on and off, this is the I/O signal or your digital 1s and 0s, the faster they are able to switch on and off (frequency in Hz/MHz/GHz etc) the more signals they can send and the faster they can move data (depends on architecture design too) but as fabrication gets smaller, electrical leakage becomes an issue. Leakage reduces CPU power efficiency and as you increase transistor frequency/add more volts i.e. potential difference, the more leakage there is and the CPU eventually becomes unstable. Leakage can cause overheating (resistance increase) instabilities in performance (incorrect signals on/off) physical warping (temporary and permanent) of transistors.

To curb leakage
• The materials need to be changed (á la HKMG)
• Temperature needs to be reduced
• Increase conductive on state
• Increase resistive off state

The latter two points are what 3D transistors are able to achieve through the basic surface area principle and it is why lithographic processes need to be able to consider the ability to create '3D' transistors.