Intel not too long ago have started a lot of research into photonics and silicon lasers as an ultra fast data transport using light itself. While early implications of light photonics may be for data storage/transfer, it’s possible that it is something that could eventually be used for on-die interconnects. Intel are experimenting with 1Tbps data speed as copper wire is reaching its physical limits of data transmission.
3D stacking is creating microarchitecture in multiple layers that all interact with one another. REAL 3D architecture is literally this, stack upon stack of dies interconnected. This seems to be a more crude construction of my thought of completely interconnected designed and manipulated 3D crystal but I give myself too much credit there.*(See final chapter)
Recent article about IBM and 3D stacking.
Diagram showing how a 3D CPU 'Brick' is stacked in layers.
Eventually this technology will lead to a Trans Superscalar MicroArchitecture, which is a term I made up to describe the next level of 3D silicon Microarchitecture. By using 3D stacking, CPU cores will eventually be able to communicate not just along the X and Y axis but also up and down the Z axis creating new pipelines and bandwidths fuelling greater CPU performance. It would even be possible to have layers of pure cache sandwiched between layers of pure x86 cores and a layer of media functionality and graphics.
IBM predicts that this method could be x1000 more powerful than current processing solutions, now combine that with a cost effective 2nm fabrication process. The result could simply be pretty immense.
Issues with 3D Stacking?
One of the primary concerns and hindrance of 3D stacking is ‘thermal density’. Creating such a dense block that develops heat through every layer can cause serious issues. So what about cooling? With IBM and 3M’s announcement about the thermal adhesive, it is definitely progress in heat dissipation but in a solid brick of processing grunt, will thermally conductive layers help? Will the shape of the stacked CPU ‘brick’ need to change for cooling purposes? Will new types of coolers be able to suffice? Or will the future see the need for these 3D cores to be suspended in coolant?
Platform design will need to be considered too. The more that happens within the CPU, the more highways you need to get the data out and then we need to talk about the physical limitations of PCBs. No doubt that once we start talking of 3D architecture, would it not be wise to assume that supporting interfaces will also need to be in a three dimensional manner too?
Possible Example of how a Complete Trans Superscalar Microarchitecture CPU core may look?
